Video decoders decode a video bit-stream encoded according to a predetermined standard syntax, such as MPEG-2 or Advanced Video Compression (AVC). An encoder generating a compressed video bit-stream makes a number of choices for converting the video stream into a compressed video bit-stream that satisfies the quality of service and bit-rate requirements of a channel and media. However, decoders have limited choices while decoding the compressed bit stream. The decoder uses the decisions made by the encoder to decode and present pictures at the output screen with the correct frame rate at the correct times, and the correct spatial resolution.
Decoding can be partitioned into two processes—the decode process and the display process. The decode process parses through the incoming bit stream and decodes the bit stream to produce decoded images which contain raw pixel data. The display process displays the decoded images onto an output screen at the proper time and at the correct and appropriate spatial and temporal resolutions as indicated in the display parameters received with the stream.
The decoding and display processes are usually implemented as firmware in Synchronous Random Access Memory (SRAM) executed by a processor. The processor is often customized and proprietary, and embedded. This is advantageous because the decoding process and many parts of the displaying process are very hardware-dependent. A customized and proprietary processor alleviates many of the constraints imposed by an off-the-shelf processor. Additionally, the decoding process is computationally intense. The speed afforded by a customized proprietary processor executing instructions from SRAM is a tremendous advantage. The drawbacks of using a customized proprietary processor and SRAM are that the SRAM is expensive and occupies a large area in an integrated circuit. Additionally, the use of proprietary and customized processor complicates debugging. The software for selecting the appropriate frame for display has been found, empirically, to be one of the most error-prone processes. Debugging of firmware for a customized and proprietary processor is complicated because few debugging tools are likely to exist, as compared to an off-the-shelf processor.
Further limitations and disadvantages of conventional and traditional approaches will become apparent to one of ordinary skill in the art through comparison of such systems with the present invention as set forth in the remainder of the present application with reference to the drawings.